Lei Xiao

This work fabricates a chip-scale microwave diffractive neural network (MDNN) in a GaAs semiconductor process, integrating cascaded couplers and phase shifters to implement a diffraction network within a millimeter-scale footprint, reducing the size of conventional MDNNs by over four orders of magnitude, achieving a computational latency of 2.05 ns and a system-level energy efficiency of 0.83 TOPS/W, and reaching more than 86% accuracy across three functional prototypes—MNIST handwritten digit recognition, multi-user interference suppression, and real-time obstacle perception for drones—thereby validating the chip's capability to directly perform both digital image processing and in-situ electromagnetic information processing in the microwave domain.

This work fabricates a chip-scale microwave diffractive neural network (MDNN) in a GaAs semiconductor process, integrating cascaded couplers and phase shifters to implement a diffraction network within a millimeter-scale footprint, reducing the size of conventional MDNNs by over four orders of magnitude, achieving a computational latency of 2.05 ns and a system-level energy efficiency of 0.83 TOPS/W, and reaching more than 86% accuracy across three functional prototypes—MNIST handwritten digit recognition, multi-user interference suppression, and real-time obstacle perception for drones—thereby validating the chip's capability to directly perform both digital image processing and in-situ electromagnetic information processing in the microwave domain.