# Hardware Acceleration

AMARA splits MCMC sampling over discrete probabilistic graphical models into an intermediate representation the compiler can process, then maps it onto a programmable ASIC. Previously CPUs and GPUs raised throughput by replicating independent Markov chains, but replicating 4096 chains yielded only about a 270-fold gain, while specialized accelerators often assumed a fixed topology or update schedule. Evaluated on grid-structured and irregular energy-based models and causal inference networks, AMARA achieves an average (up to) higher sampling throughput than a JAX-GPU baseline on irregular workloads and supports a broader range of discrete models than state-of-the-art accelerators.

AMARA splits MCMC sampling over discrete probabilistic graphical models into an intermediate representation the compiler can process, then maps it onto a programmable ASIC. Previously CPUs and GPUs raised throughput by replicating independent Markov chains, but replicating 4096 chains yielded only about a 270-fold gain, while specialized accelerators often assumed a fixed topology or update schedule. Evaluated on grid-structured and irregular energy-based models and causal inference networks, AMARA achieves an average (up to) higher sampling throughput than a JAX-GPU baseline on irregular workloads and supports a broader range of discrete models than state-of-the-art accelerators.