IBM opens the Spyre backend compiler: Inductor's core split becomes a dataflow pipeline
IBM has open-sourced a dataflow scheduler for its Spyre accelerator that reads KTIR, an MLIR representation, and turns Inductor's already-settled core division, scratchpad residency and access tiles into a dataflow pipeline, which device-specific stages then lower to SpyreCode. Previously no interface carried the full data-parallel view, so the backend had to rediscover the mapping. Bringing up the first op was about 4x faster than on the previous stack and later ops about 8x; coverage is elementwise operations with broadcast and reduction dimensions.