# Software Defined Locally Accessed Dataflow Architecture

Microsoft released Azure Maia 300, a third-generation in-house inference accelerator designed as a whole system, with software, silicon, rack, networking and datacenter co-designed so each watt and each dollar yields more useful tokens. Compared with the previous generation, it replaces uniform on-chip memory with a locality-aware non-uniform organization across chiplets, letting software place data near the compute that uses it, and adds narrow-precision formats with hardware data-type conversion to cut bytes moved per token. At system level the rack doubles to 96 accelerators, the scale-up domain grows to a 12,288-accelerator superpod, the multi-chiplet strategy raises system compute FLOPs by 36% and HBM bandwidth increases 2.5 times.

Microsoft released Azure Maia 300, a third-generation in-house inference accelerator designed as a whole system, with software, silicon, rack, networking and datacenter co-designed so each watt and each dollar yields more useful tokens. Compared with the previous generation, it replaces uniform on-chip memory with a locality-aware non-uniform organization across chiplets, letting software place data near the compute that uses it, and adds narrow-precision formats with hardware data-type conversion to cut bytes moved per token. At system level the rack doubles to 96 accelerators, the scale-up domain grows to a 12,288-accelerator superpod, the multi-chiplet strategy raises system compute FLOPs by 36% and HBM bandwidth increases 2.5 times.