A language-model agent plans its own laser fault-injection shots, skipping an instruction and bypassing a PIN check on an ATmega328P
Synopsis
Physical hardware security evaluation has depended on a person choosing each laser fault-injection position, power and timing. A large-language-model agent now links firmware reverse engineering, chip imagery and experimental decisions into a closed loop, choosing the next shot inside human-approved safety bounds. On an ATmega328P it produced a skipped load instruction and a wrong-PIN acceptance confirmed by a separate state read; on an Artix-7 FPGA the same workflow extended to ciphertext-error classification in programmable logic.
Interpretation
Decision-making in physical hardware security evaluation is now partly carried by a large-language-model agent, with humans keeping scope, safety authorization and adjudication. Laser benches could already move a stage, synchronize a pulse and read a device, but choosing where and when to intervene, and how to judge the result, remained target-specific human reasoning. On the ATmega328P, firmware and instruction-set analysis bounded the search to three pulses: two positions returned the fault-free register sequence and the third returned a complete shifted-load signature that triggered the automatic stop.
The agent organizes target evidence into an evidence-to-experiment map and derives bounded experiments and decision rules from it. Each entry links a target component or operation to candidate fault models, security consequences, observable outcomes and bounded tests, with spatial and timing hypotheses, a classifier, negative controls and a stopping rule. For the ATmega328P the map combined the datasheet, the AVR instruction set, firmware and an infrared die image, and 20 idle plus 20 active photon-emission frames localized workload-related activity to candidate digital logic.
The loop matters because the agent revises the next step after reading a physical result rather than only executing a preset sweep. When duplicate acquisitions conflicted across shots with different register outcomes, the agent rejected shot-specific timing interpretation, corrected acquisition handling and required fresh laser-off traces. In AES refinement the identical two-byte ciphertext difference recurred in 14 of 14 shots at the selected condition, and all 29 paired laser-off controls in R2b-R2e matched the fault-free ciphertext.
The same workflow moved to a second chip for ciphertext-error and sensor-concurrence classification in programmable logic. The Artix-7 stage used firmware-binary reverse engineering and optical-to-layout registration to locate the AES datapath instead of photon emission. That campaign logged 182,985 physical records across 5,545 coordinates, eleven nominal currents and three pulse widths, with 11,896 ciphertext mismatches; the 150-ns series alone is reported as 60,995 records with 7,319 mismatches.
Perspective
The demonstrated scope is three ATmega328P evaluations covering register-load behaviour, PIN verification and software AES, plus one Artix-7 campaign in programmable logic; a trained operator retained control of the class-4 laser, interlocks and emergency stop, and the agent made routine decisions only inside approved blocks. The author proposes configuration readback as the next discriminating test for repeated Artix wrong outputs.
The author states that the two-byte AES ciphertext difference does not match the four-byte output expected from a classical single-byte fault before round-9 MixColumns, that the exact round and internal mechanism remain unresolved, and that no key recovery was attempted. On the Artix side the controller retained only the final sensor sample, so monitor concurrence measures final-sample coincidence rather than the complete indication window.