Google adds TPU 8i Max and 8tx to its eighth generation: million-token context and confidential inference in one year

Google has expanded its eighth-generation TPU line from two systems to four, with TPU 8i Max targeting very long context windows and the highest compute density per rack, and TPU 8tx targeting secure and confidential inference. At Google Cloud Next in April, the same generation offered only two specialized chips: TPU 8t for large-scale training and TPU 8i for real-time reasoning. Google says this is the first time it has introduced four TPU systems in a single year, and frames them as a response to computing moving from human scale to agent scale.

The new configurations do not require a new chip tape-out; they reorganize compute, networking and storage around existing chips, including packaging, high-speed memory, optical networking and security. A new chip means laying out billions of transistors on a silicon wafer under the laws of physics and a long manufacturing lifecycle, a multi-year effort. Google architects its TPUs as modular building blocks within its AI Hypercomputer, an approach it says shortens delivery of specialized supercomputers from years to months.

The eighth-generation portfolio splits work across the AI lifecycle: 8t pursues goodput, the useful intelligence delivered per watt, while 8i is the reasoning engine designed to cut inter-chip communication delays by up to half. Google describes 8i's design intent as breaking the memory wall, the point at which moving data between chips becomes the inference bottleneck. Google's stated comparison within the generation is up to 2.7 times better training performance for 8t and 80% better inference price performance for 8i versus the previous generation.

The report draws on Google's public description of its eighth-generation TPU portfolio, covering the positioning and some performance claims for TPU 8t, 8i, 8tx and 8i Max; it is written for researchers and engineers following accelerators and inference infrastructure. Google mentions recent PyTorch-related announcements intended to make TPUs easier for developers and cloud customers to use, but the material gives no measured results or deployment timeline for the new systems.

The 2.7 times training performance and 80% inference price performance figures are stated as up to values and apply only to 8t and 8i, not to the newly announced 8tx and 8i Max; the claim that 8i cuts inter-chip communication delays by up to half is likewise framed as a design goal. The material describes 8i Max's million-token context and 8tx's encryption capability only in positioning terms, without quantified results.